Steve Edwards, CTO of Curtiss-Wright Controls Embedded Computing explores how VPX is striding forward with new enhanced specifications. Long the de facto bus architecture of choice for military embedded system designs, the VMEbus, for newer high performance, rugged deployed applications system integrators are turning to the VPX board standard (VITA 46/48) for their new designs.
VPX retains the 6U card form factor of VME, but replaces its older connector type with a new MultiGig RT2 7-row connector that provides higher speed of up to 6.25Gbit/s, increasing the maximum speed provided by VME64x by orders of magnitude.
The MultiGig RT2 connectors are arranged into groups of collective pins, which are 0th indexed from P0 through P6. At 192 pairs, VPX has enough highspeed pins for switched fabric, Ethernet and I/O. This allows copious amounts of rear I/O from the carrier, or when needed provides for the attachment of mezzanine cards. For 3U card form factors, it is expected that 3U VPX will supplant 3U CPCI.
The VME bus is expected to remain strong in legacy deployed systems. But newer rugged deployed aerospace and defence platforms are turning to the new VPX (VITA 46/48) and OpenVPX (VITA 65) standards. The OpenVPX Systems Specification (VITA 65) is the result of a cooperative group of vendors, suppliers and system integrators who worked together to solve VPX system interoperability issues. OpenVPX provides a framework for interoperability between modules and backplanes by defining a set of system specifications within VPX. These specifications, called “profiles” condense the large number of combinations and permutations between modules and backplane implementations.
By explicitly addressing system interoperability, OpenVPX will accelerate development and deployment, reduce test time and guarantee that modules from different vendors can co-exist within a given system. Further helping to speed the acceptance of VPX are complementary VITA standards, including VITA 42, VITA 57, VITA 66 and VITA 67.
For Aerospace and defence deployed systems the three VPX technology standards –VITA 46, VITA 48 and VITA 65 — are defining the future of military embedded computing. VITA 46 defines the electrical aspects of VPX, while VITA 48 define the mechanical aspects. VITA 65/OpenVPX defines how an integrator can use VPX to build systems. Together, these specifications are rapidly becoming the industry standard for new programs going forward, thanks to their increased I/O capability and their ability to handle higher density cards.
VITA specifications
Helping to take VPX further are complementary VITA specifications such as VITA 66, which defines the use of Fibre Optic connectivity out of the backplane, and VITA 67, which defines the use of Coaxial RF out of the backplane. Both of these standards will bring new capabilities directly onto the backplane, and therefore directly onto new boards once those standards are finalised.
The VITA 42 (XMC) module standard is well established now. With its support for the PCI Express it has built on the popularity of the legacy PCI-based PMC mezzanine standard. Not as well known as XMC is the VITA 57 (FMC : FPGA Mezzanine Card) standard. FMC was designed to provide a method for getting high bandwidth, low latency signaling directly into FPGAs. The approach FMC offers is elegant and straightforward. FMC uses no protocol. Instead it provides LVDS signaling directly to the FPGA, enabling higher bandwidth than an XMC card would be able to provide from the mezzanine down to the basecard. In addition, the FMC is a smaller card than the XMC, about 1/3 the size. And FMC cards are designed to do I/O matching, so whether the application requires A/D or D/A, or a CameraLink or Serial FPDP (SFPDP) interface, there is a cost-effective, compact FMC card ideal for the task. While there are several other types of I/O interfaces available, they don’t get LVDS directly to the FPGA, they aren’t general purpose, and they don’t work with other cards, they only work with FPGA cards. FMC cards, on the other hand, address a broad level of applications.
FMCs are ideal for any application where an analogue signal is brought into the system, not just signal processing applications. For example, it can be used with mission computers or other types of computers where I/O is brought in to do some kind of FPGA processing. FMCs are tied directly to an FPGA, so if you need to do anything with an FPGA, whether it’s data conversion or a kind of image processing or signal processing in the FPGA, like beamforming algorithms, and you need to bring the signal directly into the FPGA, FMC provides a superior way with significant advantages over an XMC module or a (“backlink”). On the other hand, one downside of FMC today is that it is front-panel only. So no provision exists yet to provide the same capability out the rear to the backplane. Today, FMC is mostly seen in convection-cooled applications. If the platform uses conduction-cooling you typically have to use front panel I/O.
Going forward an area of great interest is VITA 66, which defines the use of Fibre Optic connectivity out of the backplane, and VITA 67, which defines the use of Coaxial RF out of the backplane. Both of these standards will bring new capabilities directly onto the backplane, and therefore directly onto new boards once those standards are finalised.
VITA 66, the Fibre Optic (FO) specification, promises to benefit many military application. In many systems, if there is, for example, a 10 Gigabit Ethernet port out the chassis, FO connectivity will be used. But, today, FO requires front-panel I/O. In general, FO and RF connections are not dataplane data transfer mechanisms in the chassis, instead they require bringing external data into the chassis onto your basecard. While it is possible to bring FO or RF in via the front-panel today, it requires the use of a proprietary technique to route the FO to the rear of the card, snaking the FO cable around, because you still have to bring the data off the card via the front-panel.
