CAMBRIDGE, England, 17th September 2013 – XJTAG is running a free boundary scan training workshop on Tuesday 22nd October in association with the Science and Technology Facilities Council at the Rutherford Appleton Laboratory in South Oxfordshire.
Taking a hands-on approach, the free workshop will be of interest to engineers in design, development, test and production, with a comprehensive introduction to JTAG boundary scan and the IEEE 1149.x standard.
XJTAG’s workshop leaders will explain how boundary scan can be used from start to finish both to improve designs and reduce respins as well as to enhance test coverage, fault diagnosis and production yields on complex BGA-populated circuits. The session will also cover how non-JTAG devices can be tested using boundary scan.
XJTAG saves you time and money during board development by allowing early creation of reconfigurable test scripts that can be used throughout the whole of production. ‘The introduction to boundary scan is an ideal opportunity for engineers involved in design and manufacture to discover how using XJTAG can speed up the process of debugging and testing their boards throughout the product lifecycle,’ says Simon Payne, CEO XJTAG.
XJTAG is used across a variety of sectors by market-leading companies (designers, developers, OEMs and contract manufacturers) including Aeroflex, ARM, CSR, Curtiss-Wright, Imagination Technologies, Micron, and Thales.
The workshop will be held on Tuesday 22nd October and is open to electronics engineers. To book your place, or for more information, visit www.xjtag.com/workshop.php.
