Brian Caslis, Senior Software Product Planning Engineer at Lattice Semiconductor, explores how FPGA design software is evolving to meet today’s EDA design challenges.
FPGAs are being used increasingly in more cost sensitive, power sensitive, high volume applications. To meet the challenges inherent in those applications, designers need an easy to use, flexible design environment for exploring different design implementations to achieve their cost, power and performance targets, particularly as designs become larger. They need, in effect, design software that is evolving to meet their requirements. One example of this is the new Lattice Diamond design software environment.
The software expands the previously available functionality from the company’s design tools in three key areas: design exploration, ease of use, and improved design flow: all necessary for meeting the challenges of cost sensitive, power sensitive designs.
A key feature for design exploration is the addition of expanded project capabilities, including the addition of “implementations” and “strategies.”
*Implementations allow multiple versions of a design within a single project for easy design exploration. Implementations are primarily used for defining the structure of the design.
*Strategies allow implementation “recipes” to be applied to any implementation within a project, or shared between projects. Strategies tell the software tools how a design should be run or implemented.
*Design projects allow the mixing of Verilog, VHDL, EDIF and schematic sources within any implementation.
*Multiple files are supported for constraints, timing analysis, power calculation and hardware debug tools. Files can be selected and set to be active or inactive as desired, which can affect both how individual tools behave when opened and how the design is implemented.
The Run Manager view allows parallel processing of multiple implementations in order to explore design alternatives for the best results. Run Manager allows the designer to selectively choose implementations in a project and compare the results.
Implementations define the design structural elements for a project, including source code, constraint files, and any debug insertion. An implementation can be thought of as the raw material necessary to create the design. A typical use for multiple implementations within a project would be to try different architectures to determine which produced the best results. For a simple example, one implementation of a design may use inferred memory and another implementation may use instantiated memory. The designer can effectively copy an existing implementation by creating a new one and then use the source of an existing implementation as the source of the new implementation. The Diamond file list view (Fig. 1), shows the representation of the active implementation “mixed counter.”
Strategies are all the implementation-related tool settings collected in one convenient location. A strategy is the set of instructions that describes how to use the raw materials available in the implementation to build the design. The strategies within a project are automatically shared among all the implementations, and they can be saved and used in multiple projects.
Fig. 2 shows the strategy dialogue.
A new project structure provides several key benefits. Projects are now much simpler because a single project type can handle a variety of input source types and allow the management of multiple constraint, debug and analysis files. Additionally, through the use of implementations and strategies, a project can now be much more powerful, accomplishing what would have taken several projects previously.
As the use of FPGAs proliferates into new markets and applications, designers may not be familiar with FPGA design. As a result, ease of use becomes more critical than ever. The user interface combines new features and customisation while offering better ease of use. All the tools now open in “Views” integrated into a common user interface, and can be detached in separate windows. New features like the Start Page and Reports view allow easy access to information.
The user interface also offers new views for making specific tasks easier. In addition to the new Start Page and Reports view, the new ECO Editor and Programmer allow for direct editing of the physical netlist for a few common functions, and a faster way to reprogram an FPGA once the initial setup has been completed.
Another improvement is the export of designs to simulators through the new Simulation Wizard. This guides users through all the necessary steps to export a design to a simulator in the format desired, such as simulating the RTL design or the gate-level timing design.
The software adds new capabilities for scripting the design flow. Specific Tcl command dictionaries are available for projects, netlists, HDL code checking, power calculation, and hardware debug insertion and analysis. In addition to the Tcl console, a separate Tcl console application allows scripts to run independent of the full GUI. Finally, Tcl scripts can be run directly from a DOS or other command shell as commands once the correct setup has been completed.
FPGAs are now being used for a broad array of applications and tasks, so the ability to explore alternative implementations is key.
This new design environment features design exploration, ease of use, improved design flow, and numerous other enhancements. The combination of these features allows users to complete designs faster, easier, and with better results.