Altera Corporation and TSMC have announced that the two companies have worked together to bring TSMC’s patented, fine-pitch copper bump-based packaging technology to Altera’s 20 nm Arria® 10 FPGAs and SoCs. Altera is the first company to adopt this technology in commercial production with the aim of delivering improved quality, reliability and performance to Altera’s 20 nm device family.
“TSMC has provided a very advanced and robust integrated package solution for our Arria 10 devices, the highest-density monolithic 20 nm FPGA die in the industry,” said Bill Mazotti, vice president of worldwide operations and engineering at Altera. “Leveraging this technology is a great complement to Arria 10 FPGAs and SoCs and helps us address the packaging challenges at the 20 nm node.”
TSMC’s flip chip BGA package technology provides Arria 10 devices with better reliability than standard copper bumping solutions through the use of fine-pitch copper bumps. The technology is able to accommodate very high bump counts as required by high-performance FPGA products. It also provides excellent bump joint fatigue life, improved performance in electro-migration current and low stress on the ELK (Extra Low-K) layers, all highly critical features for products employing advanced silicon technologies.
“TSMC’s copper bump-based package technology provides excellent value for small bump pitch (<150µm) advanced silicon products featuring ELK,” said David Keller, senior vice president, business management, TSMC North America. “We are pleased that Altera is adopting this highly integrated packaging technology.”
